1. Field of the Invention
This invention relates to a system for coherently detecting and decoding self-clocking data signals. More specifically the present invention relates to a novel decoder and clock recovery circuit for high frequency self-clocking data signals being transmitted to the input of a decoding receiver at data rates up to 1 gigabyte per second.
2. Description of the Prior Art
Systems are presently available for transmitting unencoded data at rates which exceed one gigabyte per second. Ordinarily such prior art systems employ the technique of multiplexing together data signals of lower frequency to achieve the high frequency signals which are transmitted. If the data signal is encoded but not self-clocking, it is necessary to provide a separate clock channel. With known encoding techniques it is possible to encode the clock and data into a single signal or bit stream which reduces the number of channels required to a single channel. Some self-clocking coding schemes require a band width for the data stream that is twice the band width of the preferred embodiment encoding scheme band width which will be explained hereinafter. At both the transmitting and receiving end of a data link, it is usual to select solid state logic devices whose switching rate defines the data handling rate of the system. By proper selection of a self-clocking encoding scheme it is possible to design a system in which the data rate approaches the switching rate of the logic device selected.
Another problem arises in that it is easier to multiplex and encode for transmission encoded signals than it is to decode the transmitted signals at the receiving end. Several of the reasons which make it more difficult to decode than to encode for transmission arise from the fact that the clock and the data must be recovered from the self-clocking transmitted signal and the transmitted signal is usually attenuated and noisy, thus, any attempt to amplify the received signal also amplifies the noise. When a self-clocking transmitted signal is received and it is possible to derive a clock signal from the self-clocking received signal, it is not known which phase of the clock was used to encode the data signal. When such self-clocking data signals are transmitted at high frequencies in excess of 200 megahertz the noise in the received signal produces jitter of the clock signal which can be so severe in the case of weak signals that it is impossible to recover both the data and the clock signal.
Heretofore systems for decoding self-clocking data signals were not usually designed for extremely high frequencies. When the high frequency transmitter employs fiber-optic cable and photodetectors, the data rates have been limited by the LED or the laser signal-to-light-transducers employed at the transmitting end and by the sensitivity of the photodetector at the receiving end. Commercially available systems for decoding self-clocking data signals have not heretofore been adapted to recovery the data and the clock from high frequency signals transmitted over fiber-optic cables.
It would be extremely desirable to provide an extremely sensitive and reliable system for decoding self-clocking data signals which are extremely weak and/or have been transmitted over fiber-optic cables at extremely high data rates.